The present invention generally relates to semiconductor devices, and particularly to on-chip inductor components.
Many communication systems may be realized on a single chip. With an increased demand for personal mobile communications, integrated semiconductor devices such as complementary metal oxide semiconductor (CMOS) devices may, for example, include voltage controlled oscillators (VCO), low noise amplifiers (LNA), tuned radio receiver circuits, or power amplifiers (PA). Each of these VCO, LNA, PA, and tuned radio receiver circuits may, however, require on-chip inductor components in their circuit designs. Thus, there may be a need for high quality, variable on-chip inductor devices.
Several design considerations associated with forming on-chip inductor components may, for example, include quality factor (i.e., Q-factor), self-resonance frequency (fSR), cost considerations impacted by the area occupied by the formed on-chip inductor, inductor frequency dependent tuning range, and reconfigurable discrete inductor values (e.g., L1, L2, etc.). Accordingly, for example, a CMOS radio frequency (RF) circuit design may benefit from, among other things, one or more on-chip inductors having a moderate Q-factor, a small occupied chip area, a high self-resonance frequency value fSR value, and inductance tunability for frequency band selection.
Accordingly, on-chip inductors may take either a planar form (including line and planar spiral types) or a spiral form, and may have either a fixed or variable inductance. Mixed signal and radio frequency applications may, however, require variable reactive elements (e.g., inductors or capacitors) to achieve tuning, band switching, phase locked loop functions, etc. One approach may include coupling (e.g., series connecting: L1+L2+ . . . +Ln) inductor structures using one or more switch devices. However, regardless of whether one or more inductors are coupled to generate different inductance values, the existing inductor structures still occupy the same real estate on the chip or semiconductor substrate.
This is illustrated with the aid of FIG. 1. As depicted, a conventional variable inductor device 100 may include inductors 102, 104, and 106, which may be formed within a semiconductor structure. Inductor device 100 also includes a switch device 108 that is connected between the terminals of inductor 104 (i.e., I2), whereby upon actuation of the switch 108 to a closed position, inductor 104 is bypassed. Consequently, under such operating conditions (i.e., SW1=1: switch CLOSED) the inductance value (L) of variable inductor device 100 is governed by equivalent circuit 114, whereby the inductance value (L) is L=I1+I3. Alternatively, when the switch 108 is in an open position (SW1=0: switch OPEN), the inductance value of variable inductor device 100 is governed by equivalent circuit 112, whereby L=I1+I2+I3. As previously described, regardless of whether switch 108 is in an open or a closed position, the variable inductor device 100 is formed with three (3) inductors 102, 104, 106 that occupy the real-estate of the semiconductor structure.